High-level Vision: Top-down Processing in Neurally Inspired Architectures
نویسندگان
چکیده
منابع مشابه
Use of a Pyramid Processor in Intermediate-Level Vision (Invited)
Whereas low-level vision consists of filtering and other imageto-image operations, and high-level vision involves matching and inference of symbolic, relational structures such as graphs and frames, the problem area known as "intermediatelevel vision" requires the extraction of features and symbols from a t w e dimensional array of pixels. Conventional serial architectures do not have enough pa...
متن کاملThe Effect of Bottom-up/Top- down Techniques on Lower vs. Upper -Intermediate EFL Learners’ Listening Comprehension
Listening is regarded as an interactive process involving decoding of information. This study was launched to find out the impact of bottom-up (BU) and top-down (TD) techniques on Iranian lower and upper intermediate learners’ listening comprehension. We selected a total of 120 participants in six intact classes, three lower intermediate and three upper intermediate. The proficiency level of th...
متن کاملEvent-Related Potentials of Bottom-Up and Top-Down Processing of Emotional Faces
Introduction: Emotional stimulus is processed automatically in a bottom-up way or can be processed voluntarily in a top-down way. Imaging studies have indicated that bottom-up and top-down processing are mediated through different neural systems. However, temporal differentiation of top-down versus bottom-up processing of facial emotional expressions has remained to be clarified. The present st...
متن کاملVision: Does top-down processing help us to see?
Anatomical studies of the visual cortex have identified massive back-projecting pathways. Theoretical studies suggest how such pathways may play important roles in vision by mediating 'top-down' processing, in which information from a relatively high level is fed back to early visual stages.
متن کاملDesign and Implementation of a High Speed Systolic Serial Multiplier and Squarer for Long Unsigned Integer Using VHDL
A systolic serial multiplier for unsigned numbers is presented which operates without zero words inserted between successive data words, outputs the full product and has only one clock cycle latency. 
The multiplier is based on a modified serial/parallel scheme with two adjacent multiplier cells. Systolic concept is a well-known means of intensive computational task through replication of fu...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2008